Specifications

VXSDR 20-160 and VXSDR 20-600 Specifications

Analog RF and IF

• 5.0 - 20.0 GHz transmit and receive (usable to 22 GHz)
• robust GaN LNA
• 7 - 9 dB receive noise figure
• 5 - 12 dBm output power
• low-IF design (160 MHz or 600 MHz)
• TX output and TX/RX input/output (field replaceable SMA)

Digital

• 14-bit 160 MSPS or 600 MSPS A/D for receive
• 16-bit 160 MSPS or 600 MSPS D/A for transmit
• Altera Cyclone 10 or Arria 10 FPGAs (105k - 320k logic elements)

Control and Data Transfer

• 10 gigabit SFP+ (160 MSPS) or 40 gigabit QSFP+ (600 MSPS) Ethernet interface
• simultaneous full rate transmit and receive
• PPS and 10 MHz inputs
• external TX and RX LO inputs for precise synchronization in phased array use
• full-rate FIR filtering on transmit and receive (filter length dependent on FPGA size)

Software

• C++ and Python bindings
• Simple API, easy to port from lower-frequency SDRs
• Currently supports Linux; Mac and Windows support in development
• GPL v3 licensing of host library with public GitHub repo
• Public API documentation

Power

• 9 - 15 V DC power input
• 35 W (160 MSPS) or 45 W (600 MSPS) active, 18 W idle

Case Dimensions

• 10.5 inches (26 cm) long (including connectors)
• 6.0 inches (15 cm) wide
• 1.8 inches (4.5 cm) high